To master the future, you must first understand the past.
As rapid communications dominate the industry, it’s important to understand the predecessors that evolved into today's wireless communication: 𝗛𝗔𝗠 𝗥𝗮𝗱𝗶𝗼𝘀
Join us in our 2-week sprint to learn about and earn your 𝙤𝙥𝙚𝙧𝙖𝙩𝙤𝙧'𝙨 𝙘𝙚𝙧𝙩𝙞𝙛𝙞𝙘𝙖𝙩𝙞𝙤𝙣 in operating 𝗛𝗔𝗠 𝗥𝗮𝗱𝗶𝗼𝘀!
Logistics:
Phase 1: In-person kick-off Seminar & Hands-On testing (July 25 @ 1:30 PM, Santa Clara)
Phase 2: Online group studying & expert support (July 26 – Aug 1)
Phase 3: Certifications & building your station (Aug 2 – Aug 8)
No experience is needed; professionals like Danny Hua will guide you through this journey.
You’ll leave with a license, understanding of the groundwork behind modern communications, and access to the HAM Radio network. After the bootcamp, you're ready to join events like HAM Field Day.
Follow the QR code in the flyer for further information. We can't wait to see what you build!
To master the future, you must first understand the past.
As rapid communications dominate the industry, it’s important to understand the predecessors that evolved into today's wireless communication: HAM Radios.
Join us in our 2-week sprint to learn about and earn your certification in operating HAM Radios!
Logistics:
- Phase 1: In-person kick-off Seminar (July 25 @ 1:30 PM)
- Phase 2: Online group studying & expert support (July 26 – Aug 1)
- Phase 3: Certifications & building your station (Aug 2 – Aug 8)
No experience is needed; professionals like Danny Hua will guide you through this journey.
You’ll leave with a license, understanding of the groundwork behind modern communications, and access to the HAM Radio network.
We can't wait to see what you build!
To master the future, you must first understand the past.
As rapid communications dominate the industry, it’s important to understand the predecessors that evolved into today's wireless communication: HAM Radios.
Join us in our 2-week sprint to learn about and earn your certification in operating HAM Radios!
Logistics:
- Phase 1: In-person kick-off Seminar (July 25 @ 1:30 PM)
- Phase 2: Online group studying & expert support (July 26 – Aug 1)
- Phase 3: Certifications & building your station (Aug 2 – Aug 8)
No experience is needed; professionals like Danny Hua will guide you through this journey.
You’ll leave with a license, understanding of the groundwork behind modern communications, and access to the HAM Radio network.
We can't wait to see what you build!
35 years. One historic stage.
The CASPA 2026 CEO Summit is bringing together the top minds in semiconductors & AI.
📍 Santa Clara Convention Center
📅 Oct 23–24, 2026
🎟️ Registration: Opens July 31, 2026
🔗 Learn More & Sponsorship: caspaceosummit.com/
We’re featuring exclusive keynotes with Intel CEO Lip-Bu Tan & CASPA President Jimmy Cheng, plus discussions with leaders from Samsung, Synopsys, Cerebras, SambaNova & more.
Join industry leaders, entrepreneurs, engineers, and researchers for 2 days of insightful conversations, high-level networking, and a look at the technologies shaping the next decade.
More details and intel coming soon. Stay tuned!
Software is scaling, but the grid is hitting a wall. Meet the experts resolving AI’s power crisis this Saturday.
We’re investigating power delivery, thermal management, and their hardware implications at the CASPA x IEEE Summer Symposium.
➡️ Secure your entry passes: lnkd.in/gkqek_9H
🎙️ The Lineup:
• Systems Scaling: Ray Pang (Supermicro), Houle Gan (Google)
• Power & Silicon: Yogesh Ramadass (Wolfspeed), Gaoling Zou (Analog Devices), Jeff L Nilles (Alpha & Omega)
• Design & Automation: Zhiping Yang (PCB Automation), Kishan Joshi (Intel)
• Leadership: Don Tan (IEEE TAB), Ge (Gary) Wang (CASPA)
📅 Details:
• Saturday, July 18th | 1:00 PM – 5:00 PM
• Intel SC-12 Auditorium, Santa Clara, CA
Let’s build the foundation of the next AI era.
From 5G networks to 48V Point-of-Load systems, Gaoling Zou’s work has been foundational to the power frameworks keeping AI infrastructure from hitting a wall.
We're thrilled to introduce the Senior Director of Communication & Cloud Infrastructure Power at Analog Devices as our keynote speaker for the CASPA x IEEE Summer Symposium!
💡 The Profile:
20+ years of experience directing sustainable, power-dense infrastructure.
Pivotal in defining core markets across 5G RAN, PoL systems, and AI data centers.
We're inviting Zou and many more speakers to explore advanced power delivery, semiconductor thermal management, and their implications for AI.
📅 When: Saturday, July 18th, 2026 (Day BEFORE the World Cup Final) | 1:00 PM – 5:00 PM
📍Where: Intel SC-12 Auditorium, Santa Clara, CA
➡️ Register Here: lnkd.in/gkqek_9H
Computational efficacy necessitates power efficiency. As AI scales toward superintelligence, delivering energy consistently is the next hurdle to jump
We’re thrilled to feature Yogesh Ramadass (VP of Power Systems Solutions & Fellow at Wolfspeed) at the CASPA x IEEE Summer Symposium!
📆 Sat, July 18, 2026 | 1:00 PM – 5:00 PM (Day before World Cup Final)
📍Intel SC-12 Auditorium, Santa Clara, CA
➡️Register: [CHECK REPLIES!]
About the Speaker:
• MIT Ph.D. / IIT Kharagpur B.Tech (Gold Medalist)
• Former Head of High-Voltage Power Mgmt R&D at Texas Instruments (16 years)
• EE Times Innovator of the Year
Join us at the CASPA x IEEE Summer Symposium: Paving the AI Super-highway - Where Power Meets Intelligence! ⚡️
#AI #Semiconductors #DataCenters #IEEE
The electronics that Dr. Don Tan designed for the James Webb Space Telescope are operating flawlessly in deep space. 🛰️
On July 18th, the Caltech Ph.D., IEEE Fellow, and US National Academy of Engineering member is joining us at the CASPA x IEEE Summer Symposium in Santa Clara as a featured speaker. We’ll explore the new intersection of advanced power delivery, semiconductor thermal management, and artificial intelligence applications.
Event Details:
📆Saturday, July 18th | 1:00 PM – 5:00 PM
📍Intel SC-12 Auditorium, Santa Clara, CA
(The day BEFORE the World Cup Final)
➡️ Register Now: lnkd.in/gkqek_9H
Meet Don at the upcoming CASPA x IEEE Summer Symposium: Paving the AI Super-highway - Where Powers meets intelligence!
AI superintelligence has a massive power and cooling problem.
As AI progresses into the era of superintelligence, new questions about power density and system cooling require answers. And we've assembled a panel of experts to elucidate the solution.
🎤 Connect and discuss with industry leaders in energy, AI, and technology:
Ray Pang – SVP, Supermicro
Yogesh Ramadass – Fellow & VP, Wolfspeed
Don Tan – VP & Technical Activities Board Chair, IEEE
Gaoling Zou – Sr. Director, Analog Devices
Houle Gan – Principal Engineer, Google
Kishan Joshi – Regional Chair, IEEE PELS / Analog Design Manager, Intel
Zhiping Yang – IEEE Fellow / CEO, PCB Automation
Ge (Gary) Wang – President & Chairman, CASPA
📅 When: Saturday, July 18th, 2026 | 1:00 PM – 5:00 PM
📍Where: Intel SC-12 Auditorium, 3600 Juliette Ln, Santa Clara, CA 95054
➡️ Register Now: Link in comments
Network with over 9,000 CASPA and 10,400 IEEE Santa Clara Valley Section members and explore cutting-edge innovations in hyperscale AI computing, high-density architectures, and thermal management. Let’s work to construct the next foundation of the AI era!
CASPA x IEEE 2026 Summer Symposium: Paving the AI Superhighway — where power meets intelligence.
July 18, 1–5 PM
Intel SC-12 Auditorium, Santa Clara
Join leaders across AI, semiconductor power, and infrastructure.
Register: lnkd.in/gkqek_9H
⚡ AI's next bottleneck isn't computational—it's infrastructural, as clusters' power requirements scale from MW to GW.
📊 What will be AI's biggest infrastructure bottleneck by 2030? Vote below & reply.
#CASPA #Semiconductor #AIInfrastructure #PowerIC #AIStorage #AIHighway
0%🔋 Advanced Power ICs 💾
0%💾 AI Storage (HBM/CXL)
0%📦 Advanced Packaging
0%🌡️ Thermal Management
0 votes • Final results⚡ AI's next bottleneck isn't compute—it's power.
As AI racks push beyond 100kW+, delivering energy efficiently to silicon is becoming one of the industry's toughest challenges.
The innovation spotlight is shifting toward:
🔋 Advanced Power ICs & PMICs
⚡ Vertical Power Delivery (VPD)
📦 Co-Packaged Power Architectures
💾 Power-Optimized AI Storage (HBM4, eSSD, CXL)
🌡️ Thermal-Aware Infrastructure
The winners of the AI era won't just build faster chips.
They'll build the most efficient AI Highway—connecting power, storage, memory, and compute at scale.
Performance-per-Watt is becoming the new competitive edge.
🚀 Join CASPA Summer Symposium and explore the technologies powering the future of AI infrastructure.
#CASPA #AIHighway #PowerIC #AIStorage #AIInfrastructure #Semiconductor #DataCenter #HBM4 #CXL #PMIC #PowerDelivery #PerformancePerWatt
🚀 Everyone talks about AI models.
Few talk about the infrastructure making them possible.
As AI clusters scale, the industry is confronting three critical challenges:
⚡ Delivering thousands of amps efficiently to accelerators
💾 Feeding GPUs with data fast enough through HBM, eSSD & CXL architectures
🌡️ Managing power density and thermals at unprecedented scale
The next wave of innovation isn't just happening in AI chips—it's happening across the entire AI Highway:
🔹 Power IC & PMIC Innovation
🔹 AI Storage Optimization
🔹 Advanced Packaging & Substrates
🔹 Thermal Management
🔹 Semiconductor Infrastructure
The future belongs to those who can maximize Performance-Per-Watt, not just raw compute.
Join the conversation with Silicon Valley leaders, engineers, entrepreneurs, and investors at the CASPA Summer Symposium.
#CASPA #AIHighway #PowerIC #AIStorage #Semiconductor #AIInfrastructure #DataCenter #HBM #CXL #PMIC #SiliconValley #AI #Semiconductors #PerformancePerWatt
🚀 AI infrastructure is no longer just a compute problem.
It’s a POWER + STORAGE optimization challenge. ⚡💾
As hyperscale AI clusters scale toward 100kW+ racks, enterprise eSSD, HBM4, and CXL memory architectures are driving unprecedented power density across the data center.
The next wave of innovation will depend on:
🔹 Faster transient response
🔹 Smarter PMIC & power delivery design
🔹 Thermal-aware infrastructure
🔹 Storage efficiency at scale
🔹 Advanced packaging + vertical power delivery
AI performance-per-watt is becoming the new competitive metric.
The “AI Highway” is being built on:
⚡ Power IC innovation
💾 AI Storage optimization
🏗️ Scalable semiconductor infrastructure
Join the conversation at the CASPA Summer Symposium 2026.
#CASPA #AIHighway #PowerIC #AIStorage #Semiconductor #DataCenter #HBM #CXL #PMIC #AIInfrastructure #SiliconValley #Semiconductors
🤖 Made with AI
💾 Everyone is talking about AI compute.
But AI storage infrastructure is becoming one of the biggest hidden power challenges in modern data centers.
As AI training clusters scale:
⚡ SSD count per rack continues to increase
🔥 Thermal density rises dramatically
📈 Data movement consumes more energy than ever
🔄 Continuous model checkpointing stresses storage bandwidth
The industry is now focusing on:
🚀 Lower-power enterprise SSD architectures
🚀 Smarter PMIC and power sequencing designs
🚀 Computational storage acceleration
🚀 CXL-enabled memory/storage expansion
🚀 Advanced cooling for AI storage clusters
Interesting trend in Silicon Valley:
AI infrastructure optimization is shifting from “peak performance” to “performance-per-watt across the entire system.”
Storage is no longer just a backend component — it is becoming a strategic part of AI scalability.
At the CASPA Summer Symposium, industry leaders across AI infrastructure, semiconductor systems, and power technologies will explore how the next generation of AI platforms can scale more efficiently.
🔍 What part of AI infrastructure will become the next major bottleneck?
#CASPA #AIStorage #PowerIC #AIInfrastructure #Semiconductor #DataCenter #CXL #EnterpriseSSD #AIHighway #SiliconValley
🤖 Made with AI
When ADI drops $1.5B in cash to acquire, the message to the semiconductor industry is unmistakable:
In the AI era, power density—not compute alone—has become the defining infrastructure bottleneck. ⚡
As hyperscale AI clusters scale toward 100kW+ rack power densities, accelerators now demand thousands of amps at sub-1V rails with near-instantaneous transient response requirements. Under these conditions, traditional multi-stage power delivery architectures begin to break down under the pressure of:
• Severe IR drop
• PCB routing congestion
• Thermal constraints
• High di/dt transient conditions
• Competition for space with HBM and ultra-high-speed interconnects
The industry is rapidly shifting toward a new generation of power architecture:
🔋 Integrated Voltage Regulators (IVRs)
Moving power management directly onto or alongside the package to reduce losses, latency, and board complexity.
🔋 Vertical Power Delivery (VPD)
Delivering current vertically through the substrate to minimize parasitics while reclaiming critical lateral routing area for HBM4, CXL, and ultra-high-speed interfaces.
🔋 Ultra-Fast Transient Response
Leveraging advanced silicon capacitor technologies and highly integrated PMIC designs to stabilize massive AI load-step events without compromising core voltage integrity.
At CASPA, we view these technologies as foundational layers of the #AIHighway.
AI compute cannot scale sustainably if power integrity collapses under extreme power density.
The future of AI infrastructure will not be defined solely by FLOPS.
It will be defined by who can deliver clean, stable power at unprecedented current density.
How is your engineering team adapting to the challenges of vertical power delivery, on-package regulation, and AI-era power integrity?
The conversation is just getting started.
Join the hardware architects, power engineers, and semiconductor leaders shaping the next generation of AI infrastructure at the CASPA Summer Symposium: Power in the AI Era. 🔋
#CASPA #AIHighway #Semiconductor #PowerManagement #PowerIC #AIInfrastructure #DataCenter #HBM #CXL #AI
Join the 2026 CASPA Job Fair & Career Forum on Apr 18, 1–5 PM PDT at Q Bay Center, San Jose — a key Silicon Valley event for semiconductor & AI infrastructure talent, hiring, and industry networking. Hear from TSMC, AMD, AI startups, and more.
Connect with leaders, companies, engineers, and innovators shaping the future of AI infrastructure.
Whether you’re exploring new opportunities, hiring top talent, or staying ahead in the AI ecosystem — this is where you want to be.
📌 Scan the QR code to register now.
#CASPA #AIInfrastructure #Semiconductor #AI #TechCareers #SiliconValley #JobFair
CASPA Soft Skill Seminar: Interpersonal Skills (Intermediate): Happiness Designed to Demonstrate Your Leadership, Diplomacy and Effective Negotiation, 11/07/2019, 18:30 – 21:00, ITRI International Inc., 2870 Zanker Rd #140, San Jose, CA 95134.
eventbrite.com/e/soft-skill-…

















