Research group on integrated systems. Itsy-chipsy becoming a reality for 65nm, 130nm and 180nm. Keep tuned.
Bucaramanga, Colombia
Joined August 2016
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Here some detailed views of the micro. It is cool to show around the complexity involved in this kind of project @Learn_Things #comunidadUIS
onchip retweeted
Dynamicland's new documentation space will go online on Sept 4.
As a prelude, here is a video about Dynamicland's precursor. youtube.com/watch?v=uI7J3II5…
onchip retweeted
Watch Starship's fourth flight test xitter.gq/i/broadcasts/1OwxWYzDX…
onchip retweeted
A drug that is commonly used to treat tapeworm infections might help to prevent the formation of atypical fused cells in the lungs of patients with COVID-19, according to a paper published in Nature. go.nature.com/31RsJgX
Tim Edwards from opencircuitdesign.com and @efabless made a great summary of why chip design still quite closed-sourced youtu.be/nY6FVsAvrUo
He also introduces a lot of work done in order to get skywater-google endeavor works. hackaday.io/project/152709-i…
NVRAM license macros for std CMOS are quite expensive. We have managed to get a small-macro-first-approach silicon-proven NVRAM cell. We even proved an NVRAM PUF concept with it. Presented at @IEEEISCAS #iscas2020:
ieeexplore.ieee.org/document…
onchip retweeted
An excellent article on the role of point of care ultrasound during the COVID-19 crisis.
"All of this was achieved under crisis settings in the thick of the first wave of COVID, which was pretty amazing" - read our report on a revolution in mobile ultrasound tech at one UK hospital @RBNHSFT @ButterflyNetInc #healthtech
htworld.co.uk/news/ultrasoun…
onchip retweeted
I put together a history of @SiFive for a CICC talk earlier this year, and now the video is up:
youtube.com/watch?v=CmGIJMYw… #riscv
If you need a fast DAC, in terms of implementation and performance, for your testing activities, check this trick out: All-Digital FPGA-based DAC with None or Few External Components. BTW, you can do it with an MCU or similar @hackaday arxiv.org/pdf/2008.00572.pdf
On building USB3+ and PCIe4 interfaces for low-cost tech nodes, the CDR is a hefty block to get it right. Jitter noise requires "massaging" to have a proper CDR response. Check our digital CDR and techniques to achieve stringent jitter specs: ieeexplore.ieee.org/document…
Love to see this: arm.com/-/media/global/produ…
For several reasons. Two of them:
1. Great data on Arm model to build up an SoC. Hiden before after NDA.
2. RISC-V pushing is working since Arm is pushing back. Great for everyone. Arm has great products!
IP just for TSMC 22nmULL.
Detecting bugs and spec absences --> Simulation and Formal: The Best of Both Domains for Instruction Set Verification of RISC-V Based
Processors. We'd appreciate any feedback: onchip.uis.edu.co/pdfs/fs_p.… Thanks @symbiotic_eda @zipcpu for formal training
onchip retweeted
Molbio expert & #internship. Inspired by design of our at-home #coronavirus #test. Come Help. Guilford CT or my lab. In validation now @Yale, scaling in parallel. World needs early #virus detection. [email protected] or DM. #DIYBio #biohacking #python #DNA #SARSCoV2
64%Email or DM for Job!
36%RT to help me find Intern
11 votes • Final results onchip retweeted
“Here’s a pic of kitting up the final components. QC data came out beautiful. Really excited for the @Yale data - huge kudos to the team.” At-Home #COVID19 #test. Yale will validate against laboratory standard. Scaling in parallel to empower everyone #Coronavirus @gatesfoundation
If you like integrated circuits, here is the NetFlix of IC design (free for a limited time):
All past SSCS webinar videos & slides, ISSCC short courses & tutorials, and SSCSedu Lecture series are FREE. For a limited time, non-members can take advantage of this great offer.
resourcecenter.sscs.ieee.org…
Bus protocols to allow direct communication among masters and slaves in low-energy applications. Compared to AHB-Lite/APB, a 5X clock cycle reduction when sending data from a peripheral module to another module at the system bus ieeexplore.ieee.org/document…
Jointly with @SiFive, we presented Tucan last week at CICC. Please ask questions or add critics. We'd like to get feedback for next chips slides at docs.google.com/presentation…
While at home enjoy one of the flagship conferences on solid-state circuits. Sunday March 22 will kick off CICC 2020. First @SSCSociety fully-online conference. Keynotes will be free to attend ieee-cicc.org/virtual-event-…
Last January, after an invitation to give a talk in Intel Labs, we paid the visit to a must-to-visit in Portland area: the @vintagetek museum in Beaverton, OR. We met John Addis, the Tek engineer responsible for several circuits tricks, and a regular user of T-coils.
